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down conversion in Chinese

Pronunciation:
How to pronounce "down conversion""down conversion" in a sentence

Translationmobile phoneMobile

  • 降頻轉(zhuǎn)換
  • 下變換

Examples

  • One is the digital down conversion . the method of look - table is described in detail
    其一是數(shù)字下變頻算法，重點說明了其中的查表法及其推廣。
  • The receiver used two stages of down conversion . the total gain of receiver is more than 43db
    接收支路采用超外差兩次下變頻的方式,實驗表明接收支路的總增益大于43db 。
  • Unlike the monostatic sar , two independent local oscillators are used for up / down conversion in bistatic case , so low frequency components of phase noise cannot be cancelled
    雙基地sar用兩個獨立的本振分別實現(xiàn)上變頻和下變頻,相噪低頻分量不能相互抵消,形成與單基地sar不同的低頻相噪。
  • This dissertation focuses on the carrier recovery in high dynamic navigation receiver , the effect of iq mismatch in direct down conversion receiver and the signal to noise ratio estimator in navigation receiver
    本文以二代衛(wèi)星導航定位系統(tǒng)為應用背景,著重研究了接收機中的載波恢復技術(shù)、 iq非正交對偽碼和載波影響的模型、載噪比估計技術(shù)。
  • Transmit / receive ( t / r ) modules is the base of the modern radar . the paper puts forth a design scheme according to the target including t / r switch , up conversion , power amplified , low noise receive and down conversion . the dimension is restricted to 106 89mm through scheme comparison and the existing experiment condition , the final products arrive at the target we expect with millimeter hybrid integrated circuit
    收發(fā)t / r組件在當今雷達系統(tǒng)中占有舉足輕重的地位,本文根據(jù)設計指標提出了毫米波前端的設計方案,系統(tǒng)功能上要求完成收發(fā)雙工、上變頻和功率放大、低噪聲放大和下變頻功能,外形尺寸為106 89mm ,通過綜合方案比較,結(jié)合自身條件,選取了毫米波混合集成電路形式。
  • And the performance of these algorithms is compared with each other . to simplify the sampling rate design and digital processing in receiver , we prefer to use the direct down conversion structure . the problem is the analog front - end in this structure will bring iq mismatch , which will effect the phase of recovered carrier and code
    第三部分對接收機中的載噪比估計算法進行了分析,目前gps導航接收機中采用的載噪比估計算法對殘余多普勒非常敏感,而且gps中的數(shù)據(jù)速率為50bps ,北斗二代中的存在數(shù)據(jù)速率為500bps ,應用條件的差異導致該算法的不可用。
  • Secondly , basing on single channel if sr receiver mathematic model , this thesis has designed if sr receiver subsystem and brought forward its design project and system circuit principle diagram , and explained the system working principle . furthermore , this thesis introduces the working principles and respective applications of wideband high - speed adc ad6640 , ddc ad6620 and high - speed dsp tms320c6713 according with the if sr receiver subsystem high - speed analog digital conversion department , digital down conversion department and high speed digital signal processing department . thirdly , the thesis emphatically demonstrates the software realization department of the if sr receiver subsystem , which including ad6620 ' s inner parameter software setup , tms320c6713 data transmission and processing and the quadrant demodulation algorithm program realization
    其次，基于單通道中頻軟件無線電接收機數(shù)學模型，本文設計了中頻( if ， intermediatefrequency )軟件無線電接收機子系統(tǒng)，給出了中頻軟件無線電接收機子系統(tǒng)的設計方案和系統(tǒng)電路原理圖，說明了系統(tǒng)工作原理，并分別對應系統(tǒng)中的高速模數(shù)轉(zhuǎn)換部分、數(shù)字下變頻部分、基帶數(shù)字碩士學位論文軟件無線電理論研究及中頻軟件無線電接收機子系統(tǒng)設計信號處理部分，介紹了高速adcad664o ，數(shù)字下變頻器( ddc ， digitaldownconverter ) ad6620 ，高速數(shù)字信號處理器( dsp ， digitalsignalproeessor ) tms320c6713的工作原理，以及它們在中頻軟件無線電接收機子系統(tǒng)中的應用。
  • The radar digitalized receiver is based on digital down conversion ( ddc ) technology , which is implemented on fpga . the radar controller is based on the following technologies : fpga , tigersharc dsp and can bus . the implementation of ddc includes two parts , the demodulation and decimation of i and q channels
    雷達數(shù)字化接收機部分是基于數(shù)字下變頻( ddc )技術(shù)在fpga上實現(xiàn)的算法研究及工程實現(xiàn);雷達控制器部分是基于tigersharc 、 fpga 、 can總線的多項控制技術(shù)的方法研究及實現(xiàn)。

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